One of the possible causes of faults when operating an integrated semiconductor memory, for example a DRAM (Dynamic Random Access Memory) semiconductor memory, is the exceeding of a threshold value of a chip temperature of the integrated semiconductor memory. As a result of the increased chip temperature, malfunctions occur in the event of read and write accesses to the memory cells of the integrated semiconductor memory.
The chip temperature of a semiconductor memory is dependent on the number of read and write accesses taking place per unit time, or a clock frequency with which the integrated semiconductor memory is operated. Further factors which directly influence the chip temperature are the magnitude of the supply voltage at which a semiconductor memory is operated, and also the current intensities that occur on the memory chip. Furthermore, the bit pattern to be stored in a memory cell array of a semiconductor memory also affects the chip temperature. A heating of a memory chip may also stem from the emission of heat from other devices, in particular further semiconductor memories, situated in the vicinity of a semiconductor memory.
In order to avoid faulty memory accesses to integrated semiconductor memories, it is therefore absolutely necessary to monitor the chip temperature within a housing of the integrated semiconductor memory. Semiconductor memories are therefore generally provided with temperature sensors for recording the current chip temperature. In the event of a threshold value of the chip temperature of a semiconductor memory being exceeded, a control signal is output to a control component connected to the relevant semiconductor memory, the control signal indicating the excessive heating of the semiconductor memory to the control component. If the control component detects such a warning signal, by way of example, it reduces the number of read and write accesses to a semiconductor memory module on which the heated semiconductor memory is arranged, until the chip temperature has cooled down again.
In the case of a semiconductor memory module, generally a plurality of integrated semiconductor memories is arranged on a module circuit board. For controlling read and write accesses to the individual integrated semiconductor memories, the module is connected to a centrally arranged control component. Each integrated semiconductor memory has a control terminal specially provided for it, at which, in the event of a permissible chip temperature of the semiconductor memory being exceeded, a corresponding control signal indicating the increased heating of the semiconductor memory is output. The control terminals of the integrated semiconductor memories that are provided for generating the control signal are connected to the control component via a common line. The control component detects the occurrence of a control signal only on the common line and thereupon reduces the number of memory accesses to all the memory chips of the semiconductor memory module. Since the control terminals of the semiconductor memories of a module at which the respective control signals for warning about the increased chip temperature are generated are connected to the control component via a common line, the control component cannot ascertain which of the semiconductor memories is in a critical temperature state. The measures initiated by the control component for lowering the temperature, for example the reduction of the memory accesses per unit time to the integrated semiconductor memory, thus jointly affect all the semiconductor memories of the semiconductor memory module. In this respect, the access rate is also reduced to those semiconductor memories which have a non-critical chip temperature.
In order to be able to detect which of the semiconductor components on a memory module has an increased chip temperature, at the present time the control terminal of each semiconductor memory of the memory module which is provided for generating the control signal indicating the increased chip temperature is connected to the control component via a conductor track specially provided for the semiconductor memory component. As a result, the control component can ascertain in a targeted manner which of the semiconductor memories that it supervises has an increased chip temperature. In the event of a threshold value of the chip temperature being exceeded, only the memory accesses to the affected semiconductor memory are then reduced.
According to the specified methods specific control terminals at which the control signal indicating the increased chip temperature is generated have to be provided. Furthermore, the space requirement on the memory module increases if a specific conductor track via which the temperature warning signal is transmitted to the control component has to be provided for each semiconductor memory.